463 lines
12 KiB
ArmAsm
463 lines
12 KiB
ArmAsm
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.section .text.keepboot
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*-------------------------------------------------------
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*
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* Sega startup code for the GNU Assembler
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* Translated from:
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* Sega startup code for the Sozobon C compiler
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* Written by Paul W. Lee
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* Modified by Charles Coty
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* Modified by Stephane Dallongeville
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*
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*-------------------------------------------------------
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.globl _hard_reset
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.org 0x00000000
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_Start_Of_Rom:
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_Vecteurs_68K:
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dc.l 0x00000000 /* Stack address */
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dc.l _Entry_Point /* Program start address */
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dc.l _Bus_Error
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dc.l _Address_Error
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dc.l _Illegal_Instruction
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dc.l _Zero_Divide
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dc.l _Chk_Instruction
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dc.l _Trapv_Instruction
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dc.l _Privilege_Violation
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dc.l _Trace
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dc.l _Line_1010_Emulation
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dc.l _Line_1111_Emulation
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dc.l _Error_Exception, _Error_Exception, _Error_Exception, _Error_Exception
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dc.l _Error_Exception, _Error_Exception, _Error_Exception, _Error_Exception
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dc.l _Error_Exception, _Error_Exception, _Error_Exception, _Error_Exception
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dc.l _Error_Exception, _INT, _EXTINT, _INT
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dc.l _HINT
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dc.l _INT
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dc.l _VINT
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dc.l _INT
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dc.l _INT,_INT,_INT,_INT,_INT,_INT,_INT,_INT
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dc.l _INT,_INT,_INT,_INT,_INT,_INT,_INT,_INT
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dc.l _INT,_INT,_INT,_INT,_INT,_INT,_INT,_INT
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dc.l _INT,_INT,_INT,_INT,_INT,_INT,_INT,_INT
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.incbin "boot/rom_head.bin"
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_Entry_Point:
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move #0x2700,%sr
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tst.l 0xa10008
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bne.s SkipJoyDetect
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tst.w 0xa1000c
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SkipJoyDetect:
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bne.s SkipSetup
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lea Table,%a5
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movem.w (%a5)+,%d5-%d7
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movem.l (%a5)+,%a0-%a4
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* Check Version Number
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move.b -0x10ff(%a1),%d0
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andi.b #0x0f,%d0
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beq.s WrongVersion
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* Sega Security Code (SEGA)
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move.l #0x53454741,0x2f00(%a1)
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WrongVersion:
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move.w (%a4),%d0
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moveq #0x00,%d0
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movea.l %d0,%a6
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move %a6,%usp
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move.w %d7,(%a1)
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move.w %d7,(%a2)
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* Jump to initialisation process now...
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jmp _start_entry
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SkipSetup:
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jmp _reset_entry
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Table:
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dc.w 0x8000,0x3fff,0x0100
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dc.l 0xA00000,0xA11100,0xA11200,0xC00000,0xC00004
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*------------------------------------------------
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*
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* interrupt functions
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*
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*------------------------------------------------
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registersDump:
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move.l %d0,registerState+0
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move.l %d1,registerState+4
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move.l %d2,registerState+8
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move.l %d3,registerState+12
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move.l %d4,registerState+16
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move.l %d5,registerState+20
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move.l %d6,registerState+24
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move.l %d7,registerState+28
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move.l %a0,registerState+32
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move.l %a1,registerState+36
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move.l %a2,registerState+40
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move.l %a3,registerState+44
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move.l %a4,registerState+48
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move.l %a5,registerState+52
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move.l %a6,registerState+56
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move.l %a7,registerState+60
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rts
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busAddressErrorDump:
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move.w 4(%sp),ext1State
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move.l 6(%sp),addrState
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move.w 10(%sp),ext2State
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move.w 12(%sp),srState
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move.l 14(%sp),pcState
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jmp registersDump
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exception4WDump:
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move.w 4(%sp),srState
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move.l 6(%sp),pcState
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move.w 10(%sp),ext1State
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jmp registersDump
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exceptionDump:
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move.w 4(%sp),srState
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move.l 6(%sp),pcState
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jmp registersDump
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_Bus_Error:
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jsr busAddressErrorDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l busErrorCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Address_Error:
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jsr busAddressErrorDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l addressErrorCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Illegal_Instruction:
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jsr exception4WDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l illegalInstCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Zero_Divide:
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jsr exceptionDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l zeroDivideCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Chk_Instruction:
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jsr exception4WDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l chkInstCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Trapv_Instruction:
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jsr exception4WDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l trapvInstCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Privilege_Violation:
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jsr exceptionDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l privilegeViolationCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Trace:
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jsr exceptionDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l traceCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Line_1010_Emulation:
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_Line_1111_Emulation:
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jsr exceptionDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l line1x1xCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_Error_Exception:
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jsr exceptionDump
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l errorExceptionCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_INT:
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l intCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_EXTINT:
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l eintCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_HINT:
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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move.l hintCB, %a0
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jsr (%a0)
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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_VINT:
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movem.l %d0-%d1/%a0-%a1,-(%sp)
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ori.w #0x0001, intTrace /* in V-Int */
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addq.l #1, vtimer /* increment frame counter (more a vint counter) */
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btst #3, VBlankProcess+1 /* PROCESS_XGM_TASK ? (use VBlankProcess+1 as btst is a byte operation) */
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beq.s _no_xgm_task
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jsr XGM_doVBlankProcess /* do XGM vblank task */
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_no_xgm_task:
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btst #1, VBlankProcess+1 /* PROCESS_BITMAP_TASK ? (use VBlankProcess+1 as btst is a byte operation) */
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beq.s _no_bmp_task
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jsr BMP_doVBlankProcess /* do BMP vblank task */
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_no_bmp_task:
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move.l vintCB, %a0 /* load user callback */
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jsr (%a0) /* call user callback */
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andi.w #0xFFFE, intTrace /* out V-Int */
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movem.l (%sp)+,%d0-%d1/%a0-%a1
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rte
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*------------------------------------------------
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*
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* Copyright (c) 1988 by Sozobon, Limited. Author: Johann Ruegg
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*
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* Permission is granted to anyone to use this software for any purpose
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* on any computer system, and to redistribute it freely, with the
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* following restrictions:
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* 1) No charge may be made other than reasonable charges for reproduction.
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* 2) Modified versions must be clearly marked as such.
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* 3) The authors are not responsible for any harmful consequences
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* of using this software, even if they result from defects in it.
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*
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*------------------------------------------------
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ldiv:
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move.l 4(%a7),%d0
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bpl ld1
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neg.l %d0
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ld1:
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move.l 8(%a7),%d1
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bpl ld2
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neg.l %d1
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eor.b #0x80,4(%a7)
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ld2:
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bsr i_ldiv /* d0 = d0/d1 */
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tst.b 4(%a7)
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bpl ld3
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neg.l %d0
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ld3:
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rts
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lmul:
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move.l 4(%a7),%d0
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bpl lm1
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neg.l %d0
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lm1:
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move.l 8(%a7),%d1
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bpl lm2
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neg.l %d1
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eor.b #0x80,4(%a7)
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lm2:
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bsr i_lmul /* d0 = d0*d1 */
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tst.b 4(%a7)
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bpl lm3
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neg.l %d0
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lm3:
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rts
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lrem:
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move.l 4(%a7),%d0
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bpl lr1
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neg.l %d0
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lr1:
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move.l 8(%a7),%d1
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bpl lr2
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neg.l %d1
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lr2:
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bsr i_ldiv /* d1 = d0%d1 */
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move.l %d1,%d0
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tst.b 4(%a7)
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bpl lr3
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neg.l %d0
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lr3:
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rts
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ldivu:
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move.l 4(%a7),%d0
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move.l 8(%a7),%d1
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bsr i_ldiv
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rts
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lmulu:
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move.l 4(%a7),%d0
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move.l 8(%a7),%d1
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bsr i_lmul
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rts
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lremu:
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move.l 4(%a7),%d0
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move.l 8(%a7),%d1
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bsr i_ldiv
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move.l %d1,%d0
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rts
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*
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* A in d0, B in d1, return A*B in d0
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*
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i_lmul:
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move.l %d3,%a2 /* save d3 */
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move.w %d1,%d2
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mulu %d0,%d2 /* d2 = Al * Bl */
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move.l %d1,%d3
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swap %d3
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mulu %d0,%d3 /* d3 = Al * Bh */
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swap %d0
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mulu %d1,%d0 /* d0 = Ah * Bl */
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add.l %d3,%d0 /* d0 = (Ah*Bl + Al*Bh) */
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swap %d0
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clr.w %d0 /* d0 = (Ah*Bl + Al*Bh) << 16 */
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add.l %d2,%d0 /* d0 = A*B */
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move.l %a2,%d3 /* restore d3 */
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rts
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*
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*A in d0, B in d1, return A/B in d0, A%B in d1
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*
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i_ldiv:
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tst.l %d1
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bne nz1
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* divide by zero
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* divu #0,%d0 /* cause trap */
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move.l #0x80000000,%d0
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move.l %d0,%d1
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rts
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nz1:
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move.l %d3,%a2 /* save d3 */
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cmp.l %d1,%d0
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bhi norm
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||
|
|
beq is1
|
||
|
|
* A<B, so ret 0, rem A
|
||
|
|
move.l %d0,%d1
|
||
|
|
clr.l %d0
|
||
|
|
move.l %a2,%d3 /* restore d3 */
|
||
|
|
rts
|
||
|
|
* A==B, so ret 1, rem 0
|
||
|
|
is1:
|
||
|
|
moveq.l #1,%d0
|
||
|
|
clr.l %d1
|
||
|
|
move.l %a2,%d3 /* restore d3 */
|
||
|
|
rts
|
||
|
|
* A>B and B is not 0
|
||
|
|
norm:
|
||
|
|
cmp.l #1,%d1
|
||
|
|
bne not1
|
||
|
|
* B==1, so ret A, rem 0
|
||
|
|
clr.l %d1
|
||
|
|
move.l %a2,%d3 /* restore d3 */
|
||
|
|
rts
|
||
|
|
* check for A short (implies B short also)
|
||
|
|
not1:
|
||
|
|
cmp.l #0xffff,%d0
|
||
|
|
bhi slow
|
||
|
|
* A short and B short -- use 'divu'
|
||
|
|
divu %d1,%d0 /* d0 = REM:ANS */
|
||
|
|
swap %d0 /* d0 = ANS:REM */
|
||
|
|
clr.l %d1
|
||
|
|
move.w %d0,%d1 /* d1 = REM */
|
||
|
|
clr.w %d0
|
||
|
|
swap %d0
|
||
|
|
move.l %a2,%d3 /* restore d3 */
|
||
|
|
rts
|
||
|
|
* check for B short
|
||
|
|
slow:
|
||
|
|
cmp.l #0xffff,%d1
|
||
|
|
bhi slower
|
||
|
|
* A long and B short -- use special stuff from gnu
|
||
|
|
move.l %d0,%d2
|
||
|
|
clr.w %d2
|
||
|
|
swap %d2
|
||
|
|
divu %d1,%d2 /* d2 = REM:ANS of Ahi/B */
|
||
|
|
clr.l %d3
|
||
|
|
move.w %d2,%d3 /* d3 = Ahi/B */
|
||
|
|
swap %d3
|
||
|
|
|
||
|
|
move.w %d0,%d2 /* d2 = REM << 16 + Alo */
|
||
|
|
divu %d1,%d2 /* d2 = REM:ANS of stuff/B */
|
||
|
|
|
||
|
|
move.l %d2,%d1
|
||
|
|
clr.w %d1
|
||
|
|
swap %d1 /* d1 = REM */
|
||
|
|
|
||
|
|
clr.l %d0
|
||
|
|
move.w %d2,%d0
|
||
|
|
add.l %d3,%d0 /* d0 = ANS */
|
||
|
|
move.l %a2,%d3 /* restore d3 */
|
||
|
|
rts
|
||
|
|
* A>B, B > 1
|
||
|
|
slower:
|
||
|
|
move.l #1,%d2
|
||
|
|
clr.l %d3
|
||
|
|
moreadj:
|
||
|
|
cmp.l %d0,%d1
|
||
|
|
bhs adj
|
||
|
|
add.l %d2,%d2
|
||
|
|
add.l %d1,%d1
|
||
|
|
bpl moreadj
|
||
|
|
* we shifted B until its >A or sign bit set
|
||
|
|
* we shifted #1 (d2) along with it
|
||
|
|
adj:
|
||
|
|
cmp.l %d0,%d1
|
||
|
|
bhi ltuns
|
||
|
|
or.l %d2,%d3
|
||
|
|
sub.l %d1,%d0
|
||
|
|
ltuns:
|
||
|
|
lsr.l #1,%d1
|
||
|
|
lsr.l #1,%d2
|
||
|
|
bne adj
|
||
|
|
* d3=answer, d0=rem
|
||
|
|
move.l %d0,%d1
|
||
|
|
move.l %d3,%d0
|
||
|
|
move.l %a2,%d3 /* restore d3 */
|
||
|
|
rts
|